Design Methods for Hardware Security and Trust (RESCHIP4EU)

This training module developed by Politecnico di Milano, provides a comprehensive introduction to hardware security and trust, focusing on threats that arise throughout the design, manufacturing, and deployment of integrated circuits and systems. 

Background and context

Hardware is the root of trust in modern computing systems. As integrated circuits become increasingly complex and globally distributed, ensuring their integrity and authenticity has become a major challenge. Globalized supply chains, untrusted manufacturing, and sophisticated adversaries have introduced new forms of vulnerabilities that cannot be addressed by software alone. Engineers and researchers must therefore adopt security-by-design principles at the hardware level. 

About this course

This course equips learners with the essential knowledge and techniques to understand, model, and mitigate hardware threats, preparing them to design resilient and trustworthy systems in both academic and industrial contexts. It explores the main categories of hardware attacks (including counterfeiting, hardware Trojans, transient execution attacks, fault attacks, and side-channel attacks). It presents state-of-the-art methods to prevent, detect, and tolerate them. Through theoretical and practical content, students will learn to embed trust and resilience into the hardware design process and understand how security-aware methodologies can be integrated across the entire IC lifecycle.

Training module structure

• Introduction to Hardware Security and Trust – Foundations, terminology, and threat models; vulnerabilities in the IC supply chain; reverse engineering and counterfeiting; taxonomy and detection of hardware Trojans.
• Runtime and Microarchitectural Attacks – Transient execution vulnerabilities (Spectre, Meltdown); fault injection and scan-chain attacks; timing, power, and EM side-channel analysis. 
• Design Obfuscation, Monitoring, and Runtime Defence Techniques – Logic locking and hardware obfuscation; runtime anomaly detection; co-obfuscation; probabilistic and approximate hardware for resilience. 
• Side-Channel Countermeasures, Design-for-Trust, and Security Verification – Balanced logic styles, masking, noise injection; design-for-trust principles; secure supply chain integration; verification of security properties at RTL and gate levels. 
• Advanced Verification, Validation, and Metrics – Formal methods and dynamic validation; detection of hardware Trojans; design space exploration under security constraints; quantitative evaluation of security and trust metrics. 

Learning outcomes

Upon successful completion of this training module, students will be able to: 

• Understand fundamental concepts and threat models in hardware security and trust. 
• Identify and analyse hardware security risks across the IC supply chain. 
• Evaluate the impact of various attacks, including hardware Trojans, transient execution, fault, and side-channel attacks. 
• Select and apply appropriate countermeasures at the design and verification levels. 
• Integrate security-aware and design-for-trust methodologies into standard hardware design flows. 
• Design, analyse, and evaluate secure and trustworthy digital architectures.

Further details

The course is developed within the framework of the RESCHIP4EU project, supported by the Digital Europe Programme of the European Union. RESCHIP4EU aims to support the excellence of EU higher education around embedded systems design in a holistic way, from silicon via System-on-Chip design and manufacturing to smart and safety-critical platform and application software.