Testing and Fault Tolerance (RESCHIP4EU)

Electronic systems used in safety- and mission-critical applications - such as in aerospace, automotive, railway, and biomedical sectors - must meet stringent reliability standards. This course, developed by the Polytechnic University of Turin, introduces fundamental principles and practical techniques for ensuring system reliability through testing and fault tolerance. Topics include fault models, test generation, design for testability (DFT), and basic fault-tolerant design strategies. Emphasis is placed on digital systems and embedded platforms, focusing on both defect screening through testing and resilience through design. 

Background and context

As our world becomes increasingly reliant on embedded electronic systems in sectors such as aerospace, automotive, railway, and biomedical engineering, the consequences of system failures grow ever more significant. In these safety- and mission-critical domains, even minor malfunctions can lead to catastrophic outcomes, including threats to human life, environmental harm, and substantial financial losses. Therefore, ensuring the reliability and resilience of these systems is not just a technical requirement but a societal imperative.  

The importance of these topics is underscored by stringent international standards - such as ISO 26262 for automotive, IEC 61508 for industrial, DO-178C for aerospace, and IEC 62304 for medical devices - which mandate systematic approaches to reliability, testing, and fault tolerance throughout the product lifecycle. Mastery of these techniques is essential not only for regulatory compliance and market acceptance, but also for building public trust in technologies that increasingly shape our daily lives.

About this course

Aim: Electronic systems used in safety- and mission-critical applications - such as in aerospace, automotive, railway, and biomedical sectors - must meet stringent reliability standards. This course introduces fundamental principles and practical techniques for ensuring system reliability through testing and fault tolerance. Topics include fault models, test generation, design for testability (DFT), and basic fault-tolerant design strategies. Emphasis is placed on digital systems and embedded platforms, focusing on both defect screening through testing and resilience through design.

Course structure

• Introduction to Testing and Dependability 
• Definition and attributes of dependability 
• Fault models: stuck-at, bridge, open, delay, SEU, SET 
• Test Generation Techniques and Tools 
• Fault simulation 
• Automatic Test Pattern Generation (ATPG) 
• Design for Testability (DFT) Techniques 
• Scan-based design 
• Built-In Self-Test (BIST) 
• Boundary Scan (BS) 
• SoC testing standards: IEEE 1500 and IEEE 1687 
• Basics of Fault-Tolerant System Design 
• Redundancy techniques: hardware, information, time 
• Reliability evaluation methods: FMEA, radiation testing, fault injection 

Learning outcomes

Upon successful completion of this course, students will:

• Understand the concepts of testing, dependability, and fault models 
• Use software tools for test generation, fault simulation, and DFT insertion 
• Understand and apply techniques for system hardening and reliability evaluation 
• Design and implement BIST and utilize Boundary Scan techniques 
• Understand standards for testing SoC devices (IEEE 1500 and 1687) 
• Perform Failure Mode and Effects Analysis (FMEA) 
• Evaluate the fault tolerance of a system through practical approaches

Further details 

The course is developed within the framework of the RESCHIP4EU project, supported by the Digital Europe Programme of the European Union. RESCHIP4EU aims to support the excellence of EU higher education around embedded systems design in a holistic way, from silicon via System-on-Chip design and manufacturing to smart and safety-critical platform and application software.

Find more information on RESCHIP4EU's course page.